8051 microcontroller pin diagram

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8051 microcontroller pin diagram


The pins of the 8051 series are compatible with each other. The 8051, 8751 and 8031 are all available in a 40-pin dual-column live package. Of course, the pin functions between different chips are slightly different. The 8051 microcontroller is a high-performance microcontroller. Because it is limited by the number of pins, many pins have a second function, some of which are proprietary to the 8751 chip. A brief description of each pin function is as follows:

8051单片机各种引脚的用法及功能解析

8051 microcontroller pin diagram


VCC (40 feet): Power supply, +5V.

Vss (20 feet): Ground terminal.

Clock circuit pin XLAL2 (18-pin): Connect one end of the external crystal and trimming capacitor. If an external clock circuit is required, this pin inputs an external clock pulse. To check whether the 8051 oscillation circuit works correctly, use the oscilloscope to check whether the XLAL2 terminal has a pulse signal output.

Clock circuit pin XLAL1 (19-pin): Connect the other end of the trimmer capacitor of the external crystal. On-chip it is the input to the phase amplifier of the oscillating circuit. This pin must be tied to ground when an external clock is used.

RST (9-pin): RST is the reset signal input, active high. When this input is held for two machine cycles, that is, a high level of 24 clock oscillation cycles, the reset operation can be completed. The second function of the RST pin is VPD, the input to the alternate power supply. When the main power supply Vcc fails to reduce to a low level, the +5V power supply is automatically connected to the RST terminal to provide backup power to the RAM to ensure that the information stored in the RAM is not lost, so that the power supply can continue to operate normally after being normal.

ALE (30-pin): The address latch allows the signal terminal. When the 8051 is powered up, the ALE pin continuously outputs a positive pulse signal, which is 1/6 of the oscillator frequency fosc. When the CPU accesses the off-chip memory, the ALE output signal acts as a control signal that latches the lower 8-bit address. A pulse is lost when the CPU accesses the off-chip data memory. When the external memory is not accessed normally, the ALE terminal can also output a positive pulse with a 1/6 oscillation frequency, so ALE can also be used as an external output clock or timing signal. If you want to look at the quality of the 8051 chip, you can use the oscilloscope to see if there is a pulse signal output at the ALE terminal. If so, the 8051 is basically good. The load driving capability of the ALE terminal is 8 LS type TTL. The second function of this pin, PROG, is the programming pulse input for the 8751 curing program with 4K EPROM on-chip.

PSCN (29-pin): The program memory allows the output signal to be output. When accessing the off-chip program memory, this port timing output pulse is used as a strobe for reading the off-chip program memory. The OE end of this pin EPROM, the PSCN end is valid, that is, the instruction code in the off-chip EPROM is allowed to be read. The CPU fetches the interval in the external EPROM, and the PSCN signal is valid for two in each machine cycle. The PSCN side can also drive eight LS-type TTLs. To check whether the CPU can correctly read the instruction code in the EPROM after powering on an 8051 small system, you can also use the oscilloscope to see the PSEN terminal without pulse output. If so, it means that it basically works normally.

EA (31-pin): The external program memory address allows the input. When the EA pin is tied high, the CPU accesses the on-chip EPROM and executes the instructions in the internal program memory, but when the value of the program counter PC exceeds OFFFH, it will automatically switch to executing the program in the off-chip program memory. When the input signal EA pin is tied low, the CPU only accesses the external EPROM and executes the instructions in the external program memory, regardless of whether there is on-chip program memory. For the 8031 ​​without the on-chip ROM, the EPROM must be expanded and the EA pin must be grounded. The second function of this pin, Vpp, is to program the 8751 on-chip EPROM when it is applied as a higher programming voltage input.

P0 port (39-32 pin): P0 port is an open-drain 8-bit quasi-bidirectional I/O port. As an open-drain output port, each bit can drive eight LS-type TTL loads. When the P0 port is used as an input port, first write all 1s to the port latch (address 80H). At this time, all the pins of the P0 port are floating, which can be used as a high impedance input. When using the input port, you must first write 1, which is the meaning of quasi-bidirectional. When the CPU accesses the off-chip memory, the P0 port is a multiplex bus that provides a low 8-bit address and 8-bit data in a time-sharing manner. In this interval, the internal pull-up resistor of port P0 is valid.

P1 port (1 pin - 8 pin): P1 port is an 8-bit quasi-bidirectional I/O port with internal pull-up resistor. Each bit of the P1 port can drive four LS-type TTL loads. When the P1 port latch (address 90H) is written to all 1, the P1 port pin is connected to the high level by the internal pull-up resistor.

P2 port (21 feet - 28 feet): The P2 port is an 8-bit quasi-bidirectional I/O port with an internal resistor. Each bit of the P2 port can drive four LS-type TTL loads.

P3 port (21 feet - 28 feet): The P3 port is an 8-bit quasi-bidirectional I/O port with an internal resistor. Each bit of the P3 port can drive four LS-type TTL loads. The P3 port is very different from other I/O ports. In addition to being a general quasi-bidirectional I/O port, each pin also has a special function.



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